Manager / Lead of DV Engineering Team

Role Summary

As the Engineering Manager for the CDFX Design Verification team at Advanced Micro Devices, you will guide skilled engineers to develop and execute verification strategies for DFT IP, focusing on achieving high-quality results and first-pass silicon success for AMD’s products.

Experience Level

We are looking for a candidate with a robust background in ASIC or SoC design verification management, demonstrating proven leadership in a fast-paced semiconductor environment.

Responsibilities

• Lead and mentor a design verification team, providing guidance and performance feedback.
• Define and implement verification strategies aligned with project objectives and quality targets.
• Manage the creation and execution of thorough test plans for verification.
• Ensure quality metrics closure through consistent tracking and reporting.
• Facilitate collaboration with design, architecture, and engineering teams to address technical challenges.
• Allocate resources among verification projects to balance speed and quality.
• Promote advances in verification methods and automation initiatives.
• Assist in debugging efforts post-silicon by analyzing root-cause issues.
• Represent the verification team in project reviews and executive updates.

Requirements

The ideal candidate must have strong technical skills, ability to work independently, and passion for delivering quality designs. Essential experience includes proficiency in SystemVerilog, UVM, and coverage methodologies, as well as hands-on EDA tool expertise.

Education Requirements

A Bachelor’s or Master’s degree in electrical engineering, computer engineering, or a related field is preferred.