Lead SoC Logic Design Engineer

Role Overview

The Lead SoC Logic Design Engineer will be responsible for the development of logic design and register transfer level (RTL) coding for complex SoC designs. The role includes integrating various IP blocks and subsystems into a complete SoC design, while also participating in defining architectural features and performing rigorous quality checks.

Experience Required

This position is targeted towards experienced individuals with a minimum of 10 years in IC/SoC Design and Microarchitecture. The ideal candidate should possess in-depth knowledge of the logic development lifecycle, from high-level specifications to production.

Key Responsibilities

The responsibilities for this role include:

• Developing logic designs and RTL coding.
• Integrating and validating IPs at the SoC level.
• Conducting quality checks across all aspects of logic design.
• Implementing corrective measures for failing RTL tests.
• Ensuring that designs meet power, performance, area, and timing goals.
• Fostering collaboration with IP providers for efficient SoC integration.

Essential Qualifications

Applicants must hold at least a Bachelor’s degree in Electrical or Computer Engineering, with a Master’s degree preferred. Experience in the following areas is also necessary:

• X86 Server Microarchitecture
• Power Management strategies
• DFX methodologies such as Scan and JTAG
• Design for Debug and Coherent Fabric

Education Requirements

BSEE/CE is a minimum requirement, MS preferred.