Lead RTL Design Engineer

Company Overview: Advanced Micro Devices Inc (AMD) is a well-established player in the semiconductor industry, focusing on high-performance computing solutions.

Role Overview

The Lead RTL Design Engineer will be responsible for designing and validating new and existing features for AMD’s DDR IPs primarily focused on developing Register-Transfer Level (RTL) Intellectual Property with an emphasis on high-speed I/O connectivity subsystems.

Experience Level

This position requires a highly skilled and experienced engineer with a deep understanding of AMD-Xilinx FPGA architecture. Candidates should possess over 8 years of experience in the field.

Key Responsibilities

• Design RTL Intellectual Property focused on High-Speed IO Connectivity.
• Participate in project definition, RTL design, and implementation.
• Engage in architecture, documentation, and design processes for I/O based connectivity systems.
• Conduct RTL coding for specified design blocks.
• Implement front-end methodology flows, including resource optimization and timing analysis.
• Collaborate with cross-functional teams across time zones.

Qualifications

• Expertise in system-level architecture and familiarity with buses like AXI and High Speed serial connectivity.
• Proficient in digital design, micro-architecture, and RTL development.
• Strong programming skills in VHDL/Verilog, System C, and experience with FPGA environments.
• Hands-on experience with tools such as the Vivado toolchain and methodologies for static timing analysis.
• Familiarity with programming languages like C++, TCL, Perl, and Python.
• Ability and willingness to learn new technologies and adapt to project needs.
• Excellent communication and presentation skills for client interactions regarding product directions.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering, Electrical, or Electronic Engineering is required for this position.