Role Summary
Rambus is looking for a Lead Physical Design Engineer to join their team in Bangalore. This role involves overseeing physical design activities and executing all aspects from floor planning to tape out.
Experience Level
Minimum 10 years of experience with at least 8 years specifically in physical design at the chip and block level.
Responsibilities
- Complete ownership of physical design activities from floorplan to GDS, including PnR, STA, and physical verification.
- Independent planning and execution of synthesis, floor planning, place and route, and timing closure for designs at 28nm nodes or below.
- Directing the team on various implementation and signoff flows, and ensuring low power design practices.
- Utilizing industry-standard tools for power estimation and power grid analysis.
- Analyzing rule files for layout verification including DRC, LVS, ERC, and PERC.
Requirements
- Bachelor's degree in Electrical Engineering or related field from a reputed institute.
- At least 10 years of experience, with 8 years related to physical design at the chip/block level.
- In-depth knowledge of EDA tools and Cadence-related flows.
- Experience with Tcl/Tk or PERL is a plus.
Education Requirements
Must have a Bachelor's degree in Electrical Engineering (EE) or Electronics and Communication Engineering (ECE) from a recognized institution.