Lead MTS Logic Design Engineer

Role Summary

The Lead MTS Logic Design Engineer will be a key contributor to the design and implementation of advanced Registered Clocking Driver (RCD) products as part of the MIC IDC Design team in Bengaluru. This position entails a blend of digital logic design and working closely with various teams to ensure timely and effective product development.

Experience Level

A minimum of 8 years experience in ASIC logic/digital design is required, with a strong foundation in digital design principles. A Bachelor’s or Master’s degree in a relevant field is necessary to apply for this role.

Responsibilities

• Transform specification requirements into micro architecture specifications.
• Design RTL using Verilog/System Verilog.
• Collaborate with verification teams to establish a test plan and ensure comprehensive test coverage.
• Perform pre-implementation design checks, including lint, CDC, RDC, and constraint validation.
• Coordinate with physical design teams to define design and timing constraints, driving implementation to completion.
• Engage with cross-functional circuit teams on new product development initiatives.
• Participate in architectural discussions to outline specifications.
• Provide post-silicon validation support.

Requirements

• Extensive experience in ASIC logic/digital design (8+ years).
• Proficiency in HDLs such as Verilog or System Verilog.
• Familiarity with EDA tools for simulation, synthesis, timing analysis, and logic equivalence checks.
• Knowledge of high-speed protocols is an advantage.
• Strong scripting skills in Perl, Tcl, or Python are beneficial.
• Ability to effectively communicate technical concepts to diverse audiences.

Education Requirements

Candidates must possess at least a Bachelor’s degree in a relevant engineering discipline; a Master’s degree is preferable.