Lead IP Verification Engineer

Job Title

Lead IP Verification Engineer

Role Summary

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, ensuring no bugs in the final design. The ideal candidate has a passion for modern, complex processor architecture, digital design, and verification.

Experience Level

8+ years of experience in relevant fields.

Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to understand the features to be verified.
• Build test plan documentation, accounting for interactions with other features, hardware, firmware, and software driver use cases.
• Estimate the time required to write tests and make modifications to the test environment.
• Create directed and random verification tests.
• Debug test failures to determine root causes; work with RTL and firmware engineers to resolve issues.
• Review functional and code coverage metrics; modify or add tests to meet coverage requirements.

Requirements

• Proficient in IP-level ASIC verification.
• Experience debugging firmware and RTL code using simulation tools.
• Familiarity with UVM testbenches and proficiency in both Linux and Windows environments.
• Proficiency in Verilog, System Verilog, C, and C++.
• Graphics pipeline knowledge.
• Experience developing UVM-based verification frameworks and testbenches.
• Experience automating workflows in a distributed compute environment.
• Knowledge of simulation profiles, efficiency improvement, and HLS tools/process.
• Strong C++ background, ideally in Linux with some exposure to Windows.
• Hands-on experience with UVM concepts and SystemVerilog.
• Understanding of SystemC and TLM.
• Familiarity with scripting languages: Perl, Ruby, Makefile, shell.
• Experience in leadership or mentorship is considered an asset.
• Exposure to video codec systems or other multimedia solutions is desirable.

Education Requirements

• Bachelor's or Master's degree in Computer Engineering/Electrical Engineering.