IP Verification Senior Engineer
Senior IP Verification Engineer on the ASIC Digital Design team based in Bengaluru. Responsible for planning and executing functional verification of IP blocks, building verification environments, debugging failures, and working with RTL designers to deliver production-quality IP.
Focus areas include verification methodology, testbench development, simulation and automation to achieve functional coverage and closure.
Senior-level. Years of experience not specified in the source.
Typical responsibilities include:
Key requirements (must-have vs nice-to-have):
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
