IP Design Technical Lead/ Staff ASIC RTL Design Engineer

Role Summary

We are looking for an experienced digital design expert with extensive knowledge in ASIC RTL design to join our team. The candidate should possess a strong foundation in delivering complex, high-performance IP cores and thrive in dynamic environments.

Experience Level

4+ years of relevant industry experience in ASIC RTL design.

Responsibilities

• Architect and implement state-of-the-art RTL designs for DesignWare IP family applications.
• Translate standard and functional specifications into detailed micro-architectures.
• Lead and participate in RTL coding, synthesis, CDC analysis, and debugging tasks.
• Collaborate with global teams to refine specifications and drive design excellence.
• Mentor a team of designers and provide guidance on best practices.
• Utilize version control systems and scripting to automate design flows.

Requirements

Must possess a Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI or related field. Familiarity with industry protocols such as Ethernet, DDR, PCIe, and USB required. Proficiency in synthesizable Verilog/SystemVerilog and EDA tools essential.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or a related field.