Intern: Application Engineering - Silicon Signoff and Verification

Job Title

Intern: Application Engineering - Silicon Signoff and Verification

Role Summary

This is a part-time internship on the Silicon Signoff and Verification (SSV) team supporting signoff flows, parasitic extraction, electromigration, IR drop and power analysis using Cadence signoff tools.

The intern will work with application engineering, sales, and product/R&D teams to help customers adopt signoff solutions, run technical evaluations and benchmarks, and develop demonstrations and training materials. Expected commitment: ~20 hours/week.

Experience Level

Entry-level / Internship (student). Intended for current undergraduate students approximately one year from graduation.

Responsibilities

Core responsibilities for the internship include:

• Learn and apply Cadence silicon signoff tool flows (parasitic extraction, IR drop, electromigration, full-chip signoff).
• Assist customers in adopting signoff solutions and run technical evaluations and benchmarks.
• Prepare and deliver technical presentations, demonstrations, and training materials; customize content for customer needs.
• Collaborate with sales, product, and R&D engineers to develop technical solutions and feedback for product improvement.
• Document results and advocate best practices for signoff flows.
• Work ~20 hours per week on-site at the Belo Horizonte office.

Requirements

Must-have and preferred skills for successful candidates.

• Must-have: Strong written and verbal communication; interest in learning EDA tools and semiconductor signoff topics; self-motivated and a collaborative team attitude.
• Ability to prepare technical presentations and training material.
• Willingness to engage with customers and internal teams to troubleshoot and document workflows.
• Nice-to-have: Knowledge of MOS transistor concepts; exposure to physical verification flows (DRC, LVS, fill), parasitic extraction, IR drop/electromigration tools.
• Familiarity with Cadence implementation tools (Innovus, Virtuoso, Allegro/APD) or similar industry tools.
• Programming or scripting experience (Linux, Python, Bash, Tcl, Perl) is a plus.
• Understanding of semiconductor manufacturing processes and physical verification rule writing is beneficial.

Education Requirements

Enrollment in a Bachelor's program (BS) in Electrical, Electronics, Systems Engineering, Computer Science or related field; expected to be no more than one year from graduation (target graduation by 06/2027). Enrollment and degree progression are required.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.