Job Title
Integration Design Engineer
Role Summary
Responsible for implementing chip sections or full system-on-chip (SoC) integrations by coordinating and integrating individual IP blocks, ensuring system-level interoperability, and supporting bring-up and validation. Works within product engineering to align architecture, verification, software, and packaging considerations.
Experience Level
Mid-level. No specific years of experience provided.
Responsibilities
Primary responsibilities include:
- Integrate IPs into sections or full-chip SoC implementations and ensure correct system-level operation.
- Collaborate with architecture, verification, software, and packaging teams throughout the design cycle.
- Write scripts and perform RTL or schematic design to support integration tasks.
- Estimate power, area/size, and generate address maps for integrated designs.
- Perform design checks and timing analysis; coordinate pin migration with packaging.
- Support chip bring-up, validation, and characterization activities.
Requirements
Must-have skills and experience:
- Practical experience with RTL or schematic design and scripting for integration tasks.
- Experience in timing analysis, power and area estimation, and address map generation.
- Proven ability to work cross-functionally with architecture, verification, software, and packaging teams.
- Experience participating in chip bring-up, validation, or characterization.
Nice-to-have:
- Experience with packaging workflows and coordinating pin migration.
- Familiarity with system-on-chip integration flows and relevant EDA tools.
Education Requirements
Not specified.
About the Company
Company: Lattice Semiconductor
Headquarters: Portland, Oregon, USA
Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.

Date Posted: 2026-05-19