Infinity Fabric Verification Staff Engineer

Role Summary

The Infinity Fabric transport layer verification team is looking for a primary pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect.

Experience Level

Senior Level

Responsibilities

• Create project schedules and staging plans for new feature development.
• Develop and enhance SystemVerilog / UVM-based testbenches to verify new features for AI & Server products.
• Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers.
• Lead a team of verification engineers in the execution of new features within project timelines.
• Communicate and interact with project management to stage new feature development.
• Mentor verification engineers.

Requirements

• Proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM or related technologies.
• Comfortable creating and executing test plans in a metric-focused environment.
• Track record of leading verification teams in silicon design and verification closure.

Education Requirements

• Master’s degree in a related discipline preferred.