Role Summary
The Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.
Experience Level
Level - Senior
Responsibilities
Key responsibilities include:
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
- Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.
- Estimate the time required to write the new feature tests and any required changes to the test environment.
- Build the directed and random verification tests.
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues.
- Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements.
Requirements
Preferred experience includes:
- Proficient in IP level ASIC verification.
- Proficient in debugging firmware and RTL code using simulation tools.
- Proficient in using UVM testbenches and working in Linux and Windows environments.
- Experienced with Verilog, System Verilog, C, and C++.
- Developing UVM based verification frameworks and testbenches, processes and flows.
- Automating workflows in a distributed compute environment.
- Good understanding and hands-on experience in the UVM concepts and SystemVerilog language.
- Good working knowledge of SystemC and TLM with some related experience.
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
- Exposure to leadership or mentorship is an asset.
Education Requirements
BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.