Role Overview
The Central Engineering Team is engaged in the development of standard cells and custom design solutions for cutting-edge AI compute cores and CPUs. We are seeking a technically adept engineer to contribute to our projects and collaborate within a high-performance team.
Experience Level
This position requires a Master’s degree with over 10 years of hands-on experience, or a PhD with at least 7 years in relevant fields.
Key Responsibilities
The IC Design Engineer will be responsible for:
- Designing layouts for digital high-performance blocks.
- Ensuring timing closure with optimal power/performance/area ratios.
- Debugging LVS/DRC/ERC errors using verification tools.
- Analyzing trade-offs and performance implications across different cell architectures.
- Collaborating with design and layout engineers to enhance layout optimization.
- Working alongside CAD, packaging, and foundry teams to resolve layout and verification issues.
Job Requirements
Candidates should possess:
- A robust understanding of physical implementation processes.
- Experience with advanced semiconductor technologies.
- Proven capabilities in low power and high-performance core implementations.
- Excellent communication and collaboration skills across functions.
- Strong analytical skills for assessing complex trade-offs.
Education Requirements
A Master’s degree with 10+ years of relevant experience or a PhD with 7+ years of hands-on experience in Engineering, preferably with a focus on Place and Route tools.