High Speed SerDes DSP RTL Designer

Job Title

High Speed SerDes DSP RTL Designer

Role Summary

The role involves designing high-speed DSP SerDes RTL. The candidate will work with teams to develop RTL architecture, focusing on performance and power efficiency in high-speed designs.

Experience Level

Senior level, with at least 6 years of experience in SerDes RTL design.

Responsibilities

The main responsibilities include:

• Designing and developing RTL for high-speed ADC based SerDes.
• Verilog-HDL/System Verilog coding for PAM4 DSP.
• Utilizing front end tools for simulation and verification.
• Implementing design-for-test capabilities.
• Managing design trade-offs to meet performance, power, and cost metrics.
• Conducting synthesis, CDC, and static timing analysis.
• Collaborating with internal teams and customers.

Requirements

Must-have qualifications include:

• MS or PhD in Electrical or Computer Engineering.
• Proficient in Verilog-HDL/System Verilog.
• Experience with high-speed serialization standards (100G/200G PAM4).
• Familiarity with TSMC 7nm-2nm technology nodes.
• Strong analytical and problem-solving skills.
• Ability to work collaboratively in a team environment.

Nice-to-have qualifications:

• Understanding of microarchitecture peripherals like AMBA BUS/I2C/SPI/UART.
• Knowledge of signal integrity and power integrity modeling.
• Exposure to behavioral modeling of analog circuits.

Education Requirements

MS or PhD in Electrical Engineering or Computer Engineering.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.