High Speed IO Validation Engineer
NVIDIAJob Title
High Speed IO Validation Engineer
Role Summary
The NVIDIA Silicon Co-Design Group is hiring an engineer to perform electrical validation and characterization of high-speed SERDES IO interfaces (PCIe, USB3, Ethernet, UFS) across silicon, board, firmware, and driver. The role focuses on bench-level bring-up, stability testing, margin analysis, and delivering go/no‑go decisions for samples and production.
Expect to design and run test programs, debug complex interface issues, and apply automation and AI-driven analytics to accelerate root-cause identification and improve validation efficiency.
Experience Level
Mid-level - requires at least 3 years of relevant experience.
Responsibilities
Primary responsibilities include electrical bring-up, validation, debugging, and automation for high-speed IO interfaces.
- Execute electrical validation and characterization for PCIe, Ethernet, USB3, and UFS interfaces on GPUs, CPUs, and SoCs.
- Design and run stress, jitter, and margin tests; analyze eye diagrams, BER, and channel behavior.
- Perform bench bring-up and debug using lab equipment such as oscilloscopes (DSOs), BERTs, and protocol analyzers.
- Collaborate with firmware, driver, board, and silicon teams to reproduce and fix complex HSIO issues.
- Develop test and debug programs using scripting languages (Perl, Python) to automate validation and failure analysis.
- Translate rack-scale and platform effects into silicon/board test methodologies to reveal marginality before deployment.
- Implement AI-assisted workflows and data-driven analytics to speed root-cause analysis and improve validation quality.
Requirements
Must-have technical skills and experience for immediate contribution.
- Deep hands-on experience with high-speed/SERDES electrical validation and tuning; strong SI and PI fundamentals (S-parameters, eye analysis, channel margin, crosstalk, return loss, PDN noise, jitter decomposition).
- Proven proficiency validating PCIe or similar high-speed protocols and characterizing platform boundaries (CoWoS/interposer/substrate, board).
- Expert use of lab equipment (DSO, BERT, protocol analyzers) for diagnostics and characterization.
- Practical scripting experience (Perl, Python) to build test, data collection, and debug tools.
- Experience designing and implementing AI-assisted validation workflows and automation frameworks in the context of electrical/silicon validation.
- Strong debugging skills and the ability to collaborate across multiple engineering disciplines to drive timely resolution.
Education Requirements
BS or MS in Electronics Engineering or a related discipline, or equivalent practical experience.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
