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High-Speed I/F Subsystem Design Leader

Renesas
April 03, 2026
Full-time
On-site
Kodaira, Tokyo, Japan
Level - Senior

Role Summary

The High-Speed I/F Subsystem Design Leader will play a crucial role in defining the design direction for automotive SoCs, particularly focused on the R-Car series. The position involves collaboration with global teams and IP vendors to drive the development of high-speed interface subsystems.

Experience Level

Senior level, with candidates expected to have significant experience in relevant areas.

Responsibilities

The key responsibilities include:

  • Defining specifications and conducting architectural studies for high-speed I/F subsystems.
  • Working on interfaces such as PCIe, UCIe, USB, and UFS.
  • Identifying technical issues and contributing to design decisions.
  • Considering power, performance, and reliability factors in SoC requirements.
  • Communicating with IP vendors to confirm specifications and support issue resolution.
  • Collaborating with design teams globally.

Requirements

Must-have qualifications include:

  • Hands-on experience in PCIe, UCIe, USB, UFS.
  • Ability to organize design directions and communicate effectively.
  • Understanding of logic design and verification processes.
  • Strong communication skills in English.

Nice-to-have qualifications include:

  • Experience in a technical lead role.
  • Knowledge of power domain separation.
  • Experience in automotive SoC development.
  • Conversational proficiency in Japanese.

Education Requirements

Information not specified.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-04-03