The Hardware & Silicon Validation Principal Engineer is responsible for validation testing and debugging of high-speed Ethernet and PHY interface IP products. This role involves conducting Ethernet Protocol Compliance testing and validating various Ethernet standards.
Candidates must possess a Bachelor's degree in Software, Computer, or Electrical Engineering with 10-15 years of professional experience, or a Master's degree with 5-10 years. Previous experience with Ethernet Physical layer debugging and familiarity with high-speed interfaces is desirable.
The core responsibilities include:
Candidates should demonstrate expertise in Ethernet Physical layer debugging, networking communication standards, and proficiency in network programming. Familiarity with hardware diagnostic tools and excellent troubleshooting skills are critical for success.
Applicants must have a Bachelor's or Master's degree in Software, Computer, or Electrical Engineering.