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Hardware & Silicon Validation Principal Engineer

Marvell Technology
Full-time
On-site
Santa Clara, California, United States
$150,680 - $225,700 USD yearly
Level - Senior

Role Overview

The Hardware & Silicon Validation Principal Engineer is responsible for validation testing and debugging of high-speed Ethernet and PHY interface IP products. This role involves conducting Ethernet Protocol Compliance testing and validating various Ethernet standards.

Experience Required

Candidates must possess a Bachelor's degree in Software, Computer, or Electrical Engineering with 10-15 years of professional experience, or a Master's degree with 5-10 years. Previous experience with Ethernet Physical layer debugging and familiarity with high-speed interfaces is desirable.

Main Responsibilities

The core responsibilities include:

  • Conducting post-silicon validation testing for multi-core ARM-based network processors.
  • Performing Ethernet protocol compliance testing and ensuring standards are met.
  • Designing and implementing automation frameworks in Python for testing.
  • Maintaining lab environments for software and network feature validation.
  • Collaborating with teams to ensure hardware systems meet performance and compliance standards.
  • Troubleshooting and resolving field issues related to network processors.

Essential Skills

Candidates should demonstrate expertise in Ethernet Physical layer debugging, networking communication standards, and proficiency in network programming. Familiarity with hardware diagnostic tools and excellent troubleshooting skills are critical for success.

Education Requirements

Applicants must have a Bachelor's or Master's degree in Software, Computer, or Electrical Engineering.