Hardware Emulation Engineer

Role Summary

The Hardware Emulation Engineer role involves leading the optimization and debugging of large-scale System-on-Chip (SoC) designs on hardware emulation platforms. You will work closely with various teams to streamline pre-silicon software development and perform power and performance analysis on complex designs.

Experience Level

This position is suited for candidates with 3-8 years of practical experience in ASIC/SoC verification or emulation, preferably in a senior contributor role that includes mentoring responsibilities.

Responsibilities

• Lead the emulation of sophisticated SoC and subsystem RTL designs through compilation and debugging.
• Create and maintain automation flows and scripts utilizing TCL, Python, and Makefiles.
• Coordinate with RTL, verification, and software teams for effective integration and issue resolution.
• Implement transactors and enable hybrid co-simulation for enhanced software execution.
• Work with EDA vendors to leverage new emulator features and improve performance.
• Mentor junior engineers in best practices and effective methodologies.

Requirements

• Degree in Electronics, Computer Engineering, or equivalent.
• Proficient with major emulation platforms: Synopsys, Siemens, or Cadence.
• Strong understanding of RTL, synthesis, and timing with SystemVerilog, Verilog, or VHDL.
• Experience with debug tools and waveform analysis tools like SimVision, Verdi, or DVE.
• Familiarity with transactors, standard interfaces, and multi-clock domain designs.

Education Requirements

A relevant degree in Electronics, Computer Engineering, or a closely related field is needed to qualify for this position.