FPGA / VLSI Engineer

Job Title

FPGA / VLSI Engineer

Role Summary

Design and validate digital hardware targeting ASIC/SoC platforms for advanced communications and LEO satellite systems. The role involves RTL design, FPGA prototyping, timing analysis, and system integration while working closely with verification, ASIC, and software teams.

This is a technical engineering position based at the Saratoga office focused on delivering production-quality RTL and FPGA validation for communication subsystems.

Experience Level

Mid-level. The posting implies a need for demonstrated practical experience with RTL and FPGA flows but does not specify exact years.

Responsibilities

Primary responsibilities include implementing RTL, validating designs on FPGA, and integrating subsystems into SoC-level platforms.

• Design and implement synthesizable RTL using SystemVerilog with attention to timing, power, and area.
• Perform FPGA prototyping, hardware bring-up, and validation of digital designs.
• Develop and run simulations and debug strategies at block and subsystem levels.
• Contribute to SoC-level integration, interfacing with processors, memory, and peripherals.
• Analyze and resolve timing issues, including setup/hold violations and basic CDC concerns.
• Collaborate with verification, ASIC, and software teams to ensure functional correctness and performance.
• Participate in design reviews and help improve design quality and best practices.

Requirements

Must-have technical skills and relevant hands-on experience. Preferred items are listed separately.

Must-have:

• Proven experience writing synthesizable SystemVerilog/Verilog.
• Hands-on FPGA development experience, including synthesis, implementation, and hardware validation.
• Solid understanding of digital design fundamentals and static timing analysis.
• Ability to debug across simulation and hardware platforms.

Nice-to-have / Preferred:

• Experience with SoC FPGA platforms (for example, Xilinx Zynq or Intel SoC FPGA).
• Familiarity with AXI/AHB or similar bus protocols.
• Exposure to ASIC design flow including synthesis and STA.
• Experience with high-speed interfaces such as PCIe or Ethernet.
• Knowledge of communication systems (for example, 5G PHY/MAC concepts) or LEO satellite component development.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related technical field was listed as required. (The posting specifies these degree levels and fields.)

About the Company

Company: PDDN

PDDN is an engineering services firm specializing in ASIC and SoC verification, with expertise in ARM IPs (e.g., Cortex-A, Mali), UVM/SystemVerilog-based verification, formal methods, coverage analysis, and CI/CD-enabled hardware verification workflows.