Job Title
FPGA Verification Engineer Level 3/4 - Linthicum
Role Summary
Join the Digital Technology verification team supporting space systems digital subsystems. The role verifies FPGA/ASIC RTL and subsystem designs to ensure they meet specifications before manufacturing.
Work with designers and verification engineers to develop verification plans, build testbenches and VIP, execute simulations, analyze failures, and close coverage-driven verification campaigns.
Experience Level
Mid-level to Senior (Level 3 or Level 4). Typical experience ranges from ~5 years (Level 3) to 8+ years (Level 4) depending on degree level and responsibilities.
Responsibilities
Primary responsibilities of the FPGA Verification Engineer include:
- Perform functional verification of RTL at block and SoC level using VUnit and simulation tools.
- Develop testbenches, verification IP, verification models, coverage models, and regression suites.
- Create and maintain verification plans based on specifications and requirements.
- Run simulations, analyze failures, perform RTL debug, and work with designers to resolve defects.
- Automate regression testing and generate metrics, reports, and documentation.
- Collaborate across design, systems, and software teams to meet design goals and interfaces.
- For Level 4: mentor and coach early-career engineers as needed.
Requirements
Must-have and preferred technical qualifications (must-have items listed first):
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Must-have: 3+ years of FPGA verification experience using VUnit.
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Must-have: Proficiency with hardware description languages (SystemVerilog, Verilog, VHDL) and development in corresponding IDEs.
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Must-have: Experience developing verification test plans, testbenches, coverage metrics, and performing RTL debug.
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Must-have: Experience with FPGA or digital subsystem development and familiarity with simulation and verification workflows.
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Must-have: U.S. citizenship and ability to obtain and maintain DoD Secret or Top-Secret clearance as required.
- Familiarity with industry-standard EDA tools (examples: Synopsys, Mentor Graphics).
- Experience with coverage-driven verification methodology and Verification IP integration.
- Strong communication skills and ability to work effectively in cross-functional teams.
- Willingness to travel up to ~10%.
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Nice-to-have: Experience with SystemVerilog Assertions (SVA), VHDL Assertions, scripting (Python, Bash, Tcl, Makefile), DSP knowledge, and hands-on experience with Xilinx or Microchip FPGA families.
Education Requirements
Level 3: Bachelor's degree +5 years, Master's degree +3 years, or PhD with 0 years in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields. Level 4: Bachelor's degree +8 years, Master's degree +6 years, or PhD +3 years in the same fields.
About the Company
Company: Northrop Grumman
Headquarters: Falls Church, Virginia, United States
Northrop Grumman is a leading global aerospace and defense technology company that provides innovative solutions in mission systems, electronics, and software. With a legacy of significant advancements in technology, we empower employees to tackle complex challenges and create revolutionary systems that enhance global security. Our diverse teams focus on engineering innovation and product development, delivering solutions that support military and civilian customers worldwide.

Date Posted: 2026-07-23