FPGA Engineer

Job Title

FPGA Engineer

Role Summary

Design and implement FPGA gateware and embedded firmware for next-generation medical devices. Work on end-to-end product development from RTL through firmware, collaborating with hardware and systems engineers to deliver high-performance, production-ready designs.

The role reports to the engineering team in Alameda, CA and involves cross-disciplinary collaboration, lab bring-up, and maintaining architecture and verification documentation.

Experience Level

Mid-level — typically 2–4 years of FPGA and firmware development experience.

Responsibilities

Primary responsibilities include designing FPGA systems, developing firmware, and verifying integrations with hardware and other system components.

• Architect, design, and deliver FPGA-based digital systems from concept through deployment.
• Optimize RTL for resource utilization, power, and timing closure.
• Develop, debug, and maintain SystemVerilog/Verilog/VHDL (or Amaranth) RTL code.
• Design and maintain C/C++ firmware for bare-metal and RTOS-based SoCs and microcontrollers.
• Build Python and/or Bash utilities for build automation, FPGA configuration, and test harnesses.
• Implement and integrate digital protocols (AXI/AXI-Stream, AHB, SPI, I2C, UART, USB, PCIe, DDR interfaces).
• Collaborate with hardware engineers on schematics, component selection, and signal integrity for optimal integration.
• Debug hardware/software interactions using oscilloscopes, logic analyzers, protocol analyzers, and lab instrumentation.
• Create and maintain FPGA and firmware architecture documentation, block diagrams, and interface definitions.
• Develop and improve verification workflows using simulation and formal verification tools (e.g., UVM, cocotb).

Requirements

Must-have technical skills and experience required to perform the role.

• 2–4 years of hands-on FPGA and firmware engineering experience (project delivery from concept to production).
• Proficiency in SystemVerilog, Verilog, VHDL, or Amaranth for RTL design.
• Strong C/C++ skills for bare-metal and RTOS development.
• Experience with Python and/or Bash for build and test automation.
• Familiarity with on-chip bus protocols (AXI, AXI-Stream, AHB) and experience integrating USB, PCIe, and DDR interfaces.
• Proficient with version control systems (e.g., Git) and collaborative development practices.
• Strong hardware/software debugging skills and ability to read circuit schematics.
• Experience optimizing designs for resource use, power, and timing closure.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

Preferred Qualifications

Nice-to-have skills that strengthen a candidate's fit.

• Experience in medical device or other regulated industries.
• Experience with RTL verification frameworks (UVM, cocotb) and formal verification.
• Exposure to high-speed interfaces (USB 3.0, MIPI) and FPGA vendor toolchains (Xilinx Vivado, Intel/Altera Quartus, Lattice Radiant).
• Working knowledge of ISO 62304 or similar medical software standards.

Compensation & Benefits

Base salary range: $150,000 - $200,000 annually. Equity and benefits included.

Benefits include medical/dental/vision, life insurance, 401(k), flexible vacation, paid parental leave, and subsidized dependent care FSA.

About the Company

Company: Science

Headquarters: Alameda, CA, United States

Clinical-stage, vertically integrated neurotechnology company developing implantable devices aimed at restoring vision, cognition, and mobility. Also provides components and infrastructure to partners through its Science Foundry platform.