FPGA Design and Test Engineer, Sr Staff

Job Title

FPGA Design and Test Engineer, Sr Staff

Role Summary

Work on HAPS FPGA prototyping platforms to develop, validate, and maintain multi-FPGA implementations that enable customer ASIC designs to run before silicon. Deliver FPGA RTL and bring-up solutions, debug hardware and timing issues, and build automation and test frameworks for production deployment.

Experience Level

Senior - requires extensive experience; posting specifies 10+ years of hands-on FPGA and RTL design experience.

Responsibilities

Primary responsibilities focus on FPGA implementation, system bring-up, validation, and automation for multi-FPGA HAPS platforms.

• Develop FPGA-optimized implementations addressing capacity, timing, and multi-FPGA partitioning.
• Own RTL modification, synthesis, place-and-route, timing closure, and hardware validation on AMD/Xilinx devices.
• Lead board and system bring-up including functional validation, performance characterization, signal integrity testing, and root-cause debug.
• Develop production-ready test frameworks and automation tools (Python, C/C++) for high-speed interface validation, PRBS testing, eye analysis, and jitter/link margin measurement.
• Design and maintain inter-FPGA communication protocols, clock distribution, and reset architectures that work across device boundaries.
• Debug RTL, timing, clocking, and integration issues across simulation, emulation, and physical hardware using lab equipment.
• Collaborate with architecture, hardware, software, manufacturing, and verification teams to deliver prototyping solutions from concept to production.

Requirements

Must-have technical skills and experience; listed briefly and without educational requirements (see Education Requirements below).

• 10+ years of hands-on FPGA and RTL design experience, including multi-FPGA systems.
• Expert-level SystemVerilog/Verilog skills and strong digital design fundamentals: clocking, reset strategies, CDC, and timing analysis.
• Extensive experience with AMD/Xilinx FPGA flows (Vivado): synthesis, place-and-route, timing closure, SLR crossing and routing optimization.
• Strong software skills in Python and C/C++ for automation, test frameworks, and engineering tools.
• Proficiency with lab equipment: oscilloscopes, logic analyzers, protocol analyzers, multimeters for hardware debug and validation.
• Ability to develop production-quality tools with attention to usability, error handling, and documentation.
• Nice-to-have: experience with signal integrity characterization, PRBS testing, eye diagram analysis, jitter measurement, and link margining.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.