Experienced Memory Device / Bitcell Engineer

Job Title

Experienced Memory Device / Bitcell Engineer

Role Summary

Lead device engineering and process optimization for semiconductor memory bitcells to enable manufacturable, high-performance memory technologies. Work on device characterization, physics-based modeling, process integration, and memory enablement activities within a device engineering team at the Malta, NY site.

Responsible for enabling SRAM and non-volatile memory (NVM) features, supporting PDK/device enablement, and ensuring designs meet manufacturability and reliability targets. Work schedule is Monday–Friday, 8:00 a.m.–5:00 p.m.

Experience Level

Mid-level — requires approximately 5 years of relevant, progressively responsible engineering experience.

Responsibilities

Core responsibilities include device design, characterization, integration, and enablement for memory technologies.

• Optimize and develop memory device structures and bitcells; perform device characterization and failure-mode analysis.
• Apply semiconductor device physics and analytical/physics-based models to improve device performance.
• Develop and validate process integration flows to ensure manufacturable memory designs.
• Implement and enable memory bitcells, including SRAM and various NVM types.
• Perform device simulations using tools such as HSPICE or Spectre and analyze results to guide design decisions.
• Use semiconductor layout and memory design tools (e.g., Cadence) and follow memory design methodologies.
• Work with PDK components and related business/process flows for device and memory enablement.
• Apply statistical methods to support design, analysis, and development of megabit-scale memory arrays.
• Follow Environmental, Health, Safety & Security (EHSS) requirements and safe work practices.
• Support up to 10% domestic/international travel for conferences or project workshops; telecommuting permitted less than 50% per week within the same geographic area as the assigned office.

Requirements

Must-have technical skills and experience; degree details are listed under Education Requirements below.

• Practical experience with conventional device physics tailored to high-performance memory bitcells.
• Experience with CMOS integration technology to achieve manufacturable memory designs.
• Proficiency with semiconductor layout tools (e.g., Cadence) and memory layout practices.
• Hands-on experience developing and implementing memory bitcells, including SRAM and NVM.
• Experience using device simulation tools such as HSPICE or Spectre.
• Familiarity with PDK components and device/memory enablement processes.
• Knowledge of modern NVM technologies (for example MRAM, RRAM).
• Ability to apply statistical analysis methods for large memory arrays.

Education Requirements

Bachelor's degree in Electronic Engineering or a related field, or a foreign equivalent, plus approximately 5 years of progressively responsible experience. Employer will accept a single degree or any combination of degrees, diplomas, professional credentials, or equivalent practical experience as determined by a qualified evaluation service.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.