Engineer - Tech PNR Methodology
ArmJob Title
Engineer - Tech PNR Methodology
Role Summary
Work on the Solutions Engineering team to enable sub-2nm technology PPA for high-performance and low-power Arm products. Translate advanced-node technology capabilities into practical implementation methodologies, automation, and production-ready flows.
Collaborate with architecture, RTL, IP, physical design, DTCO, foundry, EDA, and package/board teams to define and deliver end-to-end technology PPA solutions.
Experience Level
Mid-level (Level - Mid-Career). No specific years of experience stated.
Responsibilities
Primary responsibilities include methodology development, cross-functional analysis, automation, and production readiness.
- Drive technology PPA enablement for sub-2nm and future nodes across performance, power, area, utilization, routability, and PPA convergence.
- Develop scalable methodologies and automation to evaluate and optimize trade-offs across libraries, memories, routing, power delivery, clocking, and implementation constraints.
- Perform cross-functional analysis of PPA limiters such as congestion, IR/EM, thermal, timing, leakage, dynamic power, area efficiency, and physical verification closure.
- Enable multi-die and 2.5D/3D implementations where package, power, and thermal trade-offs affect PPA.
- Execute hands-on delivery to meet goals and production requirements.
- Build AI-assisted automation and analytics for PPA exploration, recipe optimization, debug, and design closure.
- Partner with IP, DTCO, foundries, EDA, architecture, design, and implementation teams to identify and close technology entitlement gaps.
- Convert technology learnings into repeatable flows, checks, dashboards, and sign-off readiness criteria.
Requirements
Must-have technical skills and experience to perform the role.
- Expertise in advanced-node SoC physical implementation, technology PPA optimization, and methodology development.
- Understanding of technology-node trade-offs: libraries, memories, routing resources, utilization, power delivery, clocking, congestion, timing, leakage, dynamic power, and physical verification constraints.
- Programming and scripting skills (Python, C); familiarity with EDA tools, Git, and distributed processing/debug environments.
- Hands-on experience with low-power design methodologies, UPF-based design, chip finishing, and physical verification flows for advanced process technologies.
- Strong problem-solving, communication, and collaboration skills across globally distributed teams.
- Proven ability to lead technical initiatives and collaborate with foundries, EDA providers, and ecosystem partners.
Nice-to-have:
- Deep knowledge of advanced clocking structures, power delivery optimization, and physical verification convergence techniques.
- Familiarity with AI-assisted design automation and methodology optimization flows.
Education Requirements
Not specified.
About the Company
Company: Arm
Headquarters: Cambridge, United Kingdom
ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.
