Engineer IP Verification - Digital Design Verification

Job Title

Engineer IP Verification - Digital Design Verification

Role Summary

Perform RTL/IP digital verification for block-level and chip-level designs targeting DRAM and emerging memory architectures. Work on verification planning, testbench development, regression execution, coverage closure, and debug to demonstrate readiness for tapeout.

Experience Level

Entry-level — typically 2–3 years of relevant experience, or equivalent postgraduate degree in a related engineering field.

Responsibilities

The role focuses on planning and executing verification activities, collaborating with design teams, and improving verification flows and methodologies.

• Define verification scope, strategy, and plans for block/chip RTL verification.
• Develop, execute, and maintain verification testbenches and test vectors using SystemVerilog and UVM methodologies.
• Run directed and constrained-random tests and regressions; analyze results and triage failures.
• Close verification metrics (functional and code coverage); identify and address verification holes.
• Simulate, analyze, and debug block-level RTL and testbench issues; partner with designers to identify root cause and implement fixes.
• Provide verification status, risk summaries, and drive issue closure with stakeholders.
• Collaborate with international colleagues to develop and improve verification flows for DRAM and emerging memory designs.
• Proactively explore and adopt approved AI tools to support verification workflows, scripting, and methodology improvements while retaining responsibility for technical decisions.

Requirements

Must-have skills are listed first; nice-to-have items follow.

• Must-have: Strong understanding of digital circuits and RTL verification concepts; hands-on experience with SystemVerilog and UVM-based verification at block level.
• Must-have: Experience developing and running digital simulation regressions, constrained-random testing, and coverage-driven verification.
• Must-have: Proven ability to debug RTL, testbench, and environment issues and collaborate with design engineers to resolve root causes.
• Must-have: Ability to produce verification plans, status reports, and communicate technical risk clearly.
• Nice-to-have: Scripting experience (Perl, Python) to automate flows and tests.
• Nice-to-have: Familiarity with simulation and debug tools such as Virtuoso, Xcellium, SimVision, Verdi/Verisium.

Education Requirements

Bachelor's degree with 2–3 years of relevant experience, or a postgraduate degree in Electronics Engineering or a related engineering field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.