Engineer, ASIC Physical Design

Job Title

Engineer, ASIC Physical Design

Role Summary

Design, analyze, and implement digital ASIC circuits for memory products, focusing on floor-planning, placement, routing, physical verification, static timing analysis, and tape-out signoff. Work with cross-functional design and verification teams to deliver manufacturable, cost-effective, and reliable silicon.

This role supports product development from layout through signoff and may involve work at multiple U.S. sites with part-time telecommuting.

Experience Level

Mid-level. Years of experience not specified in the posting.

Responsibilities

Core responsibilities include:

• Perform chip floor-planning and implement placement and routing, including power and clock planning.
• Place macros, I/O pins, and define blockage layers.
• Perform static timing analysis and timing closure using tools such as Tempus or PrimeTime.
• Execute place-and-route flows using Cadence (Innovus/Tempus) or Synopsys (ICC2/Fusion Compiler) toolchains.
• Run physical verification and LVS/DRC using Mentor Calibre or Synopsys IC Validator/Hercules.
• Develop and maintain customized physical design flows and automation scripts (Tcl, C-shell).
• Integrate IP, validate designs, and support required tape-out revisions through final signoff.
• Collaborate with global design and verification teams to optimize manufacturability and product quality.
• Work at various U.S. locations as required.

Requirements

Must-have technical skills and experience:

• Hands-on experience with floor-planning, placement, and routing; familiarity with power and clock routing strategies.
• Experience placing macros, pins, and defining blockage layers in physical layouts.
• Static timing analysis experience using Tempus (Cadence) or PrimeTime (Synopsys).
• Place-and-route experience with Cadence Innovus/Tempus or Synopsys ICC2/Fusion Compiler.
• Physical verification experience with Mentor Calibre or Synopsys IC Validator/Hercules.
• Ability to develop and modify flow automation using Tcl and C-shell; customize scripts to manipulate flows.
• Experience with IP integration, design validation, and preparing designs for tape-out.

Nice-to-have:

• Prior experience in memory product design or high-volume silicon manufacturing flows.

Education Requirements

Employer will accept a Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.