DTCO/STCO Research Engineer — IMEC Strategic Research Partnerships

Job Title

DTCO/STCO Research Engineer — IMEC Strategic Research Partnerships

Role Summary

Serve as Intel's primary technical liaison at IMEC (based at IMEC in Leuven, Belgium), leading Design Technology Co-Optimization (DTCO) and System Technology Co-Optimization (STCO) activities that inform future semiconductor platforms, advanced packaging, and system architectures.

Drive alignment between Intel and IMEC research programs, enable transfer of technical results into Intel, and influence research direction to deliver measurable technical outcomes and business value.

Experience Level

Senior — typically requires 10+ years of experience in semiconductor technology development, technology research, DTCO/STCO, advanced packaging, product architecture, or related fields.

Responsibilities

Lead technical and program activities that connect process technology, design enablement, packaging, architecture, and system requirements.

• Lead DTCO/STCO investigations across process, design, packaging, and system trade-offs.
• Develop quantitative decision frameworks to evaluate technology options (performance, power, area, cost, yield, manufacturability, reliability, variability, system integration).
• Identify scaling challenges, technical opportunities, and research priorities for logic platforms and advanced packaging.
• Represent Intel on-site at IMEC; influence IMEC research to address Intel priorities and translate research results back to Intel organizations.
• Connect Intel domain experts with IMEC researchers to drive module, integration, design, packaging, and system-level studies.
• Track program objectives, milestones, deliverables, risks, and dependencies; escalate issues with mitigation plans.
• Facilitate technical reviews, executive updates, and cross-organizational stakeholder alignment.

Requirements

Must-have technical skills, program leadership, and partnership capabilities.

• 10+ years of experience in semiconductor technology development, research, DTCO/STCO, advanced packaging, product architecture, or related areas.
• Deep expertise in one or more semiconductor domains and ability to integrate across DTCO, STCO, packaging, architecture, and system-level tradeoffs.
• Experience with logic technology development, process integration, transistor architectures, interconnect/BEOL scaling, lithography, SRAM/standard cell architecture, design enablement, physical design, or EDA workflows.
• Familiarity with advanced packaging, chiplets, power delivery, thermal/mechanical co-optimization, heterogeneous integration, and memory/interconnect considerations.
• Proven ability to develop quantitative analyses and decision frameworks to guide technology choices and research priorities.
• Strong stakeholder management, influencing, communication, and executive presentation skills.
• Demonstrated success leading complex technical programs across organizational and geographic boundaries without direct authority.

Education Requirements

Master's degree or PhD in Electrical Engineering, Computer Engineering, Materials Science, Physics, or a related discipline (as stated). Equivalent practical experience is not explicitly listed but may be considered in lieu of degree by hiring organization.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.