Director of R&D Engineering - ASIC Digital IP Verification

Role Summary

The Director of R&D Engineering at Synopsys leads the development of high-performance ASIC products for digital IP verification. This role involves managing a large team of engineers and collaborating with cross-functional partners to meet market demands effectively.

Experience Level

This position requires an extensive background, demanding 18+ years with a BSEE or 16+ years with an MSEE, emphasizing a robust experience in VLSI/ASIC design and verification.

Responsibilities

The individual in this role will be responsible for:

• Leading a multi-site team in the development of advanced IP cores.
• Executing innovative product strategies and overseeing project management for timely deliveries.
• Mentoring and coaching engineering talent while establishing technical processes and quality standards.
• Building and maintaining relationships with customers to ensure satisfaction with product outcomes.

Requirements

Ideal candidates will have:

• Expertise in connectivity protocols, including PCIe, MIPI-UFS, Unipro, SD-MMC, Ethernet, USB, and AMBA.
• A strong foundation in software tools, verification methodologies such as UVM, and hands-on experience with Verilog/System Verilog.
• A demonstrated ability to scale teams and manage project delivery successfully.
• Strong problem-solving skills and a solutions-oriented mindset.