Job Title
Director, Custom HBM Design and Architecture
Role Summary
Lead a technical team responsible for design, integration, and delivery of custom HBM SoC logic die targeted at AI/ML applications. Drive architecture and implementation strategy across multiple product generations and work with architecture, design, verification, physical design, firmware, and product teams.
Experience Level
Senior-level engineering leadership. Preferred: 15+ years of relevant SoC design and technical leadership experience.
Responsibilities
Accountable for technical direction, execution, and delivery of HBM SoC RTL and integration across the product lifecycle. Key responsibilities include:
- Analyze system-level hardware/software interactions and identify performance bottlenecks for AI/ML workloads.
- Define and advance HBM architecture and micro-architecture, including proof-of-concept designs.
- Translate architectural specifications into robust RTL implementations and own RTL deliverables from development through silicon bring-up.
- Drive engineering trade-offs across performance, power, area, schedule, and risk.
- Coordinate pre-silicon validation, hardware emulation, and post-silicon debug activities.
- Identify execution risks early and implement mitigation plans across teams and phases.
- Recruit, build, mentor, and scale a high-performing RTL design and integration team.
- Develop technical leaders and strengthen organizational HBM SoC capabilities.
Requirements
Must-have technical skills and experience required to perform the role; preferred items listed separately.
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Must-have: Proven experience leading large-scale SoC design teams delivering complex SoCs to advanced process nodes.
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Must-have: Deep expertise in RTL design, SoC integration, and RTL-to-GDS flows (including synthesis, timing, and signoff considerations).
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Must-have: Experience integrating complex IP subsystems (controllers, NOC, microcontrollers, PHY-adjacent logic, RAS, MBIST, standard interfaces).
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Must-have: Strong understanding of SoC architecture topics: clocking, reset, power management, and system-level trade-offs.
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Must-have: Experience with pre-silicon validation, hardware emulation, and post-silicon debug methodologies.
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Must-have: Familiarity with RTL/SystemVerilog and scripting languages such as Python and TCL.
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Nice-to-have: Knowledge of DRAM/HBM systems and JEDEC standards.
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Nice-to-have: Demonstrated success driving multiple tape-outs and cross-functional SoC programs; experience building/managing global engineering teams.
Education Requirements
Not specified.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

Date Posted: 2026-06-23