Digital Verification Principal Engineer
Lead verification engineer responsible for developing verification environments and testbenches for Interface IP (e.g., PCIe, CXL, DDR, Ethernet). Work closely with design and architecture teams to ensure functional correctness, coverage closure, and delivery of production-quality IP.
Senior / Principal level. The posting does not state an explicit years-of-experience requirement.
Primary responsibilities include planning and executing verification activities for complex interface IP and mentoring less-experienced engineers.
Must-have technical skills and experience. Where possible, items are brief and specific.
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
