Digital Design Verification Apprenticeship
SynopsysRole Summary
The Digital Design Verification Apprenticeship at Synopsys offers fresh graduates an opportunity to gain real-world experience in semiconductor verification. Apprentices will work closely with teams on high-performance silicon chip design, focused on verification plans for high-speed PHYs and Serdes.
Experience Level
Entry-level - Ideally suited for recent graduates from the class of 2024 or 2025.
Responsibilities
Apprentices will be responsible for:
- Developing and executing verification plans based on complex networking protocols.
- Creating and enhancing verification environments using System Verilog and methodologies like VMM/UVM.
- Participating in technical reviews and contributing ideas to improve development processes.
Requirements
Must-have skills and qualifications include:
- B.E./B.Tech in Electronics, Electrical, Instrumentation, or related fields.
- Hands-on experience in creating verification plans and environments from specifications.
- Familiarity with System Verilog and VMM/UVM methodologies.
- Strong communication skills and a willingness to learn.
Education Requirements
Required educational background includes a Bachelor’s degree in Electronics, Electrical, Instrumentation, or related fields.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
