DFX Verification Lead

Role Summary

The DFX Verification Lead will oversee verification activities on complex SoC designs within the S3 SoC DFX Team at AMD. This role focuses on managing the DFX verification for critical SoCs that integrate AMD's high-performance X86 cores and various IPs.

Experience Level

This position requires candidates to have a preferable experience of 10 to 15 years in verification, especially with modern processor architecture and digital design.

Responsibilities

• Lead DFX verification activities on complex SoCs consisting of billions of transistors.
• Develop and implement test cases using Verilog, C-code, and System Verilog within UVM frameworks.
• Utilize scripting languages such as Perl or Python for automation and development.
• Debug and execute test cases using DVE/VERDI simulators.
• Collaborate with designers to address RTL bug fixes and support post-silicon bring-up activities.
• Document test plans, verification strategies, integration guides, and release notes.
• Conduct regression test tracking and generate coverage reports.

Requirements

Candidates must possess strong communication and problem-solving skills, with a proven ability to work in a team environment. A hands-on experience in the development and debugging processes related to AMBA, HSIO, IEEE protocols, and DFT techniques such as JTAG and BSCAN is essential. Candidates should hold a Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.