DFT Lead

Role Summary

The DFT Lead is tasked with the planning and execution of verification processes for AMD’s graphics processor IP, ensuring designs are free of bugs and meet all quality standards.

Experience Level

This position requires a deep understanding of complex processor architecture and digital design verification. Candidates should possess strong communication skills and the ability to work with a diverse team across multiple locations.

Responsibilities

This role involves:

• Collaborating with architects, hardware engineers, and firmware engineers to outline verification requirements for new features.
• Documenting test plans that consider hardware, firmware, and software design interactions.
• Estimating effort for creating new tests and any environmental adjustments needed.
• Developing both directed and random verification tests.
• Debugging test failures in collaboration with RTL and firmware teams to address design defects.
• Analyzing functional and code coverage metrics, adjusting tests as necessary to fulfill coverage standards.

Requirements

Preferred qualifications include:

• Proficiency in IP level ASIC verification and simulation tool experience for debugging RTL and firmware.
• Experience with UVM testbenches in both Linux and Windows environments.
• Familiarity with Verilog, System Verilog, C, and C++.
• Knowledge of graphics pipeline processes and UVM based verification framework development.
• Automation skills in distributed computing environments.
• Background in C++ programming, particularly on a Linux platform.
• Working knowledge of SystemC and TLM, with experience in scripting languages such as Perl, Ruby, and shell.
• Prior exposure to leadership or mentorship is advantageous.
• Experience with video codec systems or multimedia solutions is a plus.

Education Requirements

A Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required.