Job Title
DFT Engineers
Role Summary
Responsible for design-for-test (DFT) implementation, ATPG pattern generation, and test validation for SoC/ASIC projects. The role works within semiconductor program teams to ensure testability, diagnostics, and production-ready test strategies.
Work includes using industry-standard EDA tools to implement scan, MBIST, IO test and clock DFT features and to debug test failures in collaboration with RTL and design teams.
Experience Level
Mid-level β typically requires 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs.
Responsibilities
Primary responsibilities focus on DFT/ATPG delivery and test diagnostics for ASIC/SoC designs.
- Develop and validate ATPG patterns; analyze and debug test failures.
- Implement and verify scan-based DFT features addressing controllability and observability.
- Design and validate MBIST memory test architectures and diagnostics.
- Define and validate IO and pin-level test methodologies.
- Implement and verify clock DFT strategies and perform clock domain test checks.
- Collaborate with RTL, digital design, and verification teams to improve testability.
- Use industry-standard DFT/ATPG EDA tools and document test procedures and results.
- Work effectively in fast-paced semiconductor programs and communicate findings to stakeholders.
Requirements
Must-have technical skills and experience.
- 5+ years hands-on experience in DFT and ATPG for SoC or ASIC designs.
- Strong understanding of DFT fundamentals: controllability, observability, and scan-based testing.
- Proven expertise in ATPG pattern generation, analysis, and debug.
- Experience with MBIST memory test architectures and diagnostics.
- Knowledge of IO test methodologies for interface and pin-level validation.
- Solid understanding of clock DFT and clock verification concepts.
- Strong grasp of digital design and RTL fundamentals.
- Experience with industry-standard DFT/ATPG EDA tools.
- Strong analytical, problem solving, and communication skills.
Education Requirements
Bachelor of Engineering (BE) is specified.
About the Company
Company: L&T Technology Services
Headquarters: Vadodara, India
Global engineering and R&D services company providing product development, digital and embedded engineering, systems and software services, and semiconductor/IoT solutions for industries including automotive, industrial, medical, telecom, and energy.

Date Posted: 2026-05-20