DFT Engineer - Hardware
Responsible for end-to-end design-for-test (DFT) implementation and verification for ASIC projects, from RTL through gate-level scan insertion to silicon bring-up. Work includes DFT architecture, ATPG, JTAG/boundary scan, security mechanisms, test clocking, and post-silicon validation as part of a cross-functional hardware team.
Contribute to developing and deploying DFT methodologies for next-generation products and improving DFT quality and effectiveness.
Mid-level; approximately 2+ years of relevant industry experience is expected.
Key responsibilities include:
Must-have skills and experience:
Bachelor of Science in Electrical Engineering (BSEE) or Master of Science in Electrical Engineering (MSEE) from a reputable institution, or equivalent practical experience. The posting indicates ~2+ years of relevant experience may be considered as equivalent.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
