DFT Engineer

Job Title

DFT Engineer

Role Summary

Work on design-for-test (DFT/DFX) verification and debug for SoC projects, focusing on testplan creation, testbench development, gate-level simulation, and tapeout support. The role is execution-focused and supports bringing complex SoC designs from verification through manufacturing test readiness.

Experience Level

Mid-level. The posting requests approximately 5–10 years of relevant hands-on experience in DFX/DFT and SoC verification.

Responsibilities

Primary responsibilities include verification, testbench development, and silicon debug for DFX at the SoC level.

• Develop and maintain DFX/DFT testbenches and SoC test infrastructure for DFX validation.
• Author SoC DFX testplans and reuse existing verification infrastructure for DFX testing.
• Create DFX-related testcases, implement functional coverage, and write assertions.
• Perform gate-level simulation and netlist debugging for DFX issues.
• Debug JTAG/TAP and BIST-related failures and support manufacturing test development at the SoC level.
• Collaborate with cross-functional teams to drive designs to tapeout.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: 5–10 years hands-on experience with DFX/DFT architectures and SoC DFX verification through tapeout.
• Experience defining SoC testbenches and developing DFX testbench components and testcases.
• Practical experience with functional coverage implementation and assertion coding.
• Gate-level simulation experience and netlist debugging skills.
• Proficiency in scripting (Perl and Shell) for test automation and debug.
• Experience debugging JTAG/TAP and BIST at the SoC level.
• Nice-to-have: Exposure to multi-core/multi-processor architectures and manufacturing test development/debug.

Education Requirements

Not specified.

About the Company

Company: QData