DFT Engineer

Job Title

DFT Engineer

Role Summary

Lead the design-for-test (DFT) solution for an SoC project, owning DFT architecture, specification, verification, and integration across IP, memories, and system interfaces.

This role works closely with Chip Architecture, Design Verification, Physical Design, Power, and Test groups to enable first-tapeout success and silicon bring-up.

Experience Level

Mid-level. No specific years-of-experience requirement stated.

Responsibilities

Primary responsibilities include designing and validating DFT infrastructure and supporting silicon bring-up.

• Create DFT specifications, verification plans, and define the SoC test interface.
• Develop and implement DFT architecture and integrate it into large SoC blocks (IP integration, system/control bus, memories, hard macros).
• Implement testbenches, generate directed and constrained-random tests, debug failures, run gate-level simulations, and close coverage.
• Generate structural test vectors, run synthesis and timing closure, and address timing impacts of DFT logic.
• Support STA, physical, power, and logical analysis for DFT modes.
• Partner with Test Engineers to bring up test vectors on silicon and support silicon debug.

Requirements

Must-have technical skills and competencies follow; preferred items are listed separately.

• Solid knowledge of DFT practices: ATPG, JTAG, MBIST, and trade-offs between test quality and test time.
• Proficient in Verilog and/or VHDL; hands-on experience with simulators and waveform debugging tools.
• Experience developing DFT specifications and driving DFT architecture and methods for designs.
• Understanding of design verification (DV) methodologies for validating DFT in pre-silicon simulation.
• Proficient in scripting (Python, TCL, or Perl); familiarity or proficiency using generative AI tools to accelerate scripting and workflows.
• Fluent written and spoken English, able to express complex technical concepts clearly.

Education Requirements

B.Sc., M.Sc., or PhD in Electrical Engineering, Computer Science, or a related technical field.

Preferred Qualifications

• Experience debugging compressed ATPG patterns, MBIST, and JTAG/1500 issues.
• Experience with STA constraints development and analysis for DFT modes and SDF simulations.
• Experience conducting silicon debug experiments, gathering/analyzing data, and scripting to support ATE data handling.
• Experience in large SoC design or verification; strong problem-solving and communication skills.

About the Company

Company: Apple

Headquarters: Cupertino, California, United States

Apple is a multinational technology company that designs, manufactures, and sells consumer electronics, software, and online services. Known for its innovative products such as the iPhone, Mac computers, and iPad, Apple emphasizes a strong commitment to high-quality design and user experience.