Job Title
DFT Engineer
Role Summary
Work in Broadcom's ASIC Product Division on SoC DFT from specification through implementation, verification, and production release. Collaborate with physical design, STA, test engineering and customers to meet product test and yield goals.
Primary focus: DFT architecture, scan/ATPG/MBIST/LBIST integration, pattern generation, silicon bring-up and yield improvement.
Experience Level
Senior — typically 8+ years with a Bachelor's degree or 6+ years with a Master's degree in a relevant field.
Responsibilities
Key responsibilities include:
- Define DFT specifications and test strategies to meet product and customer test metrics.
- Implement DFT features (Scan, MBIST, TAP, LBIST, IO, SerDes and other I/O DFT integration).
- Generate, verify and debug ATPG vectors; validate test vectors on ATE during silicon bring-up.
- Work with STA and physical design teams for DFT mode timing closure.
- Support post-silicon debug, failure analysis, RMA, and yield improvement efforts.
- Automate DFT and test vector generation flows and innovate solutions for advanced process nodes.
- Interface with customers and cross-functional global teams.
Requirements
Must-have skills and experience:
- Strong DFT background: ATPG, scan, BIST (logic and memory), and DFT feature integration.
- Experience with scan insertion and compression tools (e.g., DFT Compiler, Mentor TestKompress).
- ATPG vector generation, simulation and debugging experience (e.g., TetraMax, Fastscan).
- Verilog coding, testbench generation and simulation experience.
- Memory BIST insertion and verification for embedded memories (SRAM, CAM, eDRAM, ROM).
- Boundary-scan/IEEE 1149.x verification and test vector generation.
- Familiarity with Test-STA, constraints, and timing closure for test modes.
- Knowledge of IEE1687/IJTAG, ICL and PDL.
- Strong debug, root-cause analysis, statistical process control and data-analysis skills to drive yield improvements.
- Ability to work across disciplines and manage competing deliverables with cross-functional teams.
Nice-to-have:
- Experience with ATE and silicon bring-up.
- Experience with SerDes, DDR, PCIe, Ethernet, CXL IOBIST verification and silicon debug.
- Experience with Tessent SSN or similar tools.
- Experience with analog DFT and device physics fundamentals.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Mathematics or a related technical field with 8+ years of related experience; or a Master's degree with 6+ years of related experience. Equivalent practical experience is accepted where noted.
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

Date Posted: 2026-05-03