The DFT DV Verification Lead is responsible for planning, building, and executing the verification of both new and existing features for AMD’s graphics processor IP. The aim is to ensure that the final design is devoid of bugs.
The ideal candidate will possess a strong passion for modern processor architecture, digital design, and verification processes. You should be adept at collaborating with engineers across various locations and have excellent communication skills. Strong analytical and problem-solving skills are essential, along with a willingness to learn and tackle challenging issues.
As a DFT DV Verification Lead, your main responsibilities include:
The candidate should hold a BS/MS in Electrical Engineering, Computer Engineering, or Computer Science, along with a minimum of 8 years of design verification experience. Familiarity with OOP coding in SystemVerilog, SpecmanE, or C++, and experience with SystemVerilog Assertions are also required.
BS or MS in Electrical Engineering (EE), Computer Engineering (CE), or Computer Science (CS).