DFT Architect, Product Engineering and Test Solutions - ATPG

Job Title

DFT Architect, Product Engineering and Test Solutions - ATPG

Role Summary

Lead a team of Application/Product Engineers responsible for validating and deploying Synopsys Design-for-Test (DFT) and ATPG products to customers. The role focuses on team execution, customer success, cross-functional coordination with R&D and Product, and delivery of high-quality outcomes for ATPG and diagnostics engagements.

Experience Level

Senior-level. Requires extensive experience; posting specifies 15+ years in DFT for SoC/ASIC development and customer-facing technical leadership.

Responsibilities

Core responsibilities include technical leadership, customer support, and operational management for ATPG and diagnostics products.

• Lead, hire, onboard, coach, and manage a team of Application Engineers to ensure strong customer outcomes.
• Set priorities, allocate resources, and manage execution across multiple customer engagements and internal deliverables.
• Own and drive resolution of customer escalations for ATPG and diagnostics engagements in partnership with R&D and Product teams.
• Define and standardize best practices for pre-silicon integration reviews, signoff checklists, and milestone-based customer engagement.
• Lead initiatives to define and implement AI-empowered flows that accelerate IP integration, debug, and customer engagement.
• Drive cross-functional collaboration to improve product quality, documentation, collateral, and enablement based on field learnings.
• Track and report key metrics (milestone health, issue trends, response times, customer satisfaction) and continuously improve team processes.
• Maintain awareness of industry standards and market trends in ATPG and translate them into team readiness and customer guidance.

Requirements

Must-have skills and experience for successful performance in this role.

• 15+ years of experience in DFT for SoC/ASIC development, applications engineering, and bring-up with demonstrated customer-facing technical leadership.
• Technical depth in DFT/ATPG tools and workflows, including integrating DFT into synthesis flows and producing tester-ready ATPG vectors with sign-off results.
• Strong understanding of tape-out flows and milestones (integration, test signoff, timing closure, handoff) and experience supporting customers through tape-out schedules.
• Proven people leadership: hiring, coaching, setting team vision and operating rhythm, and managing performance across multiple programs.
• Strong project and program management skills: planning, risk management, escalation handling, and clear communication with internal and external stakeholders.
• Excellent verbal and written communication skills and ability to collaborate across teams to deliver customer solutions.
• Analytical and problem-solving skills; ability to lead structured debug and resolution plans.
• Nice-to-have: prior experience launching AI-enabled engineering flows and working with diagnostics products.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field is specified. Equivalent practical experience is generally accepted if demonstrated by the required technical and leadership experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.