Design Verification Principal Engineer

Role Summary

As a Design Verification Principal Engineer, you will lead the verification efforts for cutting-edge semiconductor designs, ensuring that products meet performance and quality standards through rigorous testing and validation processes.

Experience Level

Senior

Responsibilities

• Develop and implement verification plans for various design projects.
• Lead a team of engineers to execute comprehensive verification tasks.
• Collaborate with design and architecture teams to understand specifications and key elements for testing.
• Utilize simulation and formal verification tools to validate designs.
• Generate and review documentation for verification processes and outcomes.

Requirements

Significant experience in digital design verification, with proficiency in SystemVerilog, UVM, and RTL coding. Strong analytical skills are essential, along with expertise in related EDA tools.