Design Verification Engineer

Job Title

Design Verification Engineer

Role Summary

Join the Hardware verification team to plan and execute verification for blocks, subsystems, full-chip and system-level silicon for high-performance GenAI products. The role focuses on delivering functionally accurate, performant silicon through verification methodology, testbench development, and verification closure.

Experience Level

Mid-level. Candidates across early, mid and senior career bands are considered; specific level will depend on demonstrated experience and responsibilities.

Responsibilities

You will define and execute verification plans, produce testbenches and tests, and drive verification closure through sign-off milestones.

• Contribute to a scalable verification methodology spanning block, subsystem, full-chip and system-level validation.
• Develop testbenches, tests, and artifacts to achieve structural and functional coverage closure.
• Own verification execution for assigned subsystems and chip-level areas.
• Plan and lead intermediate and sign-off reviews of verification test plans and execution progress.
• Create portable tests and drivers applicable to silicon validation and post-silicon debug.
• Collaborate with architecture and design teams to translate specs into verification deliverables.
• Participate in silicon debug, bring-up, and post-silicon validation as required.

Requirements

Must-have skills and production experience required for the role; items listed as "nice-to-have" are optional.

• Must-have: Concept-to-silicon experience driving verification from architecture/spec to production silicon.
• Must-have: Production experience with SystemVerilog and advanced verification methodologies such as UVM and assertion-based verification; formal and simulated verification experience required.
• Must-have: Programming/scripting experience (Python, C/C++, Bluespec or similar) for verification and modeling.
• Must-have: Experience creating portable tests and drivers for silicon validation and post-silicon debug.
• Must-have: Strong understanding of silicon micro-architecture and design concepts for high-performance compute, memory management, and high-speed connectivity.
• Nice-to-have: Familiarity with emulation and prototyping platforms and methodologies.
• Nice-to-have: Hands-on experience with silicon debug and bring-up.

Education Requirements

Not specified.

About the Company

Company: MatX

Headquarters: Mountain View, California, USA

MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.