Design Verification Engineer

Role Overview

The Infinity Fabric transport layer verification team is seeking a pre-silicon verification engineer to verify configurable switches and die-to-die interconnects. Infinity Fabric technology is integral to AMD's products across multiple market segments including Client, Server, Graphics, and Semi-Custom.

Experience Level

This position is suitable for candidates with senior engineering experience, specifically within the domain of ASIC RTL verification using System Verilog and UVM.

Core Responsibilities

The responsibilities of this role include:

• Enhancing System Verilog and UVM-based testbenches for new features.
• Collaborating with architects, RTL designers, performance engineers, and post-silicon validation engineers.
• Developing expertise in the Infinity Fabric architecture and TestBench Verification Components.
• Providing mentorship to junior engineers.

Candidate Requirements

Ideal candidates should possess the following qualifications:

• Strong proficiency in IP level ASIC verification.
• Experience in architecting and developing complex verification environments, including scripting in Perl, Ruby, Make, or similar tools.
• Familiarity with RTL design, software development, or formal verification.
• Experience in UVM TestBench Development.
• Preferred industry experience.

Education Requirements

A Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or Computer Engineering is required.