Design Verification Engineer

Job Title

Design Verification Engineer

Role Summary

Responsible for pre-silicon verification of L2/L3 network switching and routing ASICs within the CSG group (Tomahawk family). The role focuses on verification architecture, test-plan development, SystemVerilog/UVM testbench implementation, execution of verification suites, and coverage closure.

Work involves ensuring functional correctness and performance of high-throughput networking ASICs and collaborating with design and validation teams to prepare silicon for production.

Experience Level

Senior — typical experience expectations: BS +8+ years, MS +6+ years, or PhD +3+ years (or equivalent practical experience).

Responsibilities

Primary responsibilities include:

• Participate in the full verification lifecycle for L2/L3 switch and routing ASICs and related subsystems.
• Develop detailed test plans for networking features such as traffic streaming, traffic management, scheduling, shaping, latency and performance characterization.
• Design and implement SystemVerilog/UVM testbenches, verification APIs, automation scripts and build/run infrastructure across toolchains.
• Convert test plans into executable test suites and drive pre-silicon verification to completion using functional and code coverage metrics.
• Analyze failures, debug issues, and coordinate with design and validation teams to resolve defects.

Requirements

Must-have technical skills and experience:

• Strong experience with Hardware Description Languages such as Verilog and SystemVerilog and with UVM-based verification.
• Proficient in scripting languages (Python, Perl) and object-oriented programming.
• Proven experience with end-to-end verification workflows from test-plan definition to coverage closure on ASIC/SoC that progressed to production.
• Experience developing verification environments, testbenches, and automation for multi-tool flows.
• Strong verbal and written communication skills.

Nice-to-have:

• Experience with networking ASIC features (L2/L3 switching, routing), traffic management and performance characterization.
• Familiarity with object-oriented, modular, reusable verification methodologies and environments.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE), Master of Science in Electrical Engineering (MSEE) or PhD in a related technical field, or equivalent practical experience. Typical experience equivalencies noted in the posting: BS +8+ years, MS +6+ years, PhD +3+ years. Concentration in digital design or related area preferred.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.