Design & Verification Engineer

Job Title

Design & Verification Engineer

Role Summary

Mid-level RTL design and verification engineer on the PHY integration team responsible for pre-silicon RTL design and verification of PCIe Controller Soft IP and PHY integrations for PCIe and CXL controller technologies.

The role is based in Sofia, Bulgaria and involves working with global teams and customers to integrate IPs, develop verification environments, and improve verification processes. This is a full-time, hybrid position.

Experience Level

Mid-level — typically requires approximately 6+ years of verification and RTL/ASIC experience.

Responsibilities

Key responsibilities include RTL integration, verification, and customer support for IP integrations.

• Implement Verilog RTL to integrate IPs (for example, PCIe IP with vendor PHY modules).
• Develop and maintain simulation and verification environments; run and validate integration tests.
• Create, maintain and support test cases across verification environments.
• Perform FPGA prototyping and debug IP integration issues.
• Support worldwide customers on IP integration and coordinate with international teams.
• Maintain traceability from customer/product specifications to architecture and verification results.
• Track verification productivity metrics and report progress and issues periodically.
• Review existing verification processes and propose improvements.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: 6+ years of ASIC/VLSI verification experience using Verilog/SystemVerilog and FPGA prototyping.
• Must-have: 6+ years experience with UVM or Avery (or equivalent verification methodology) and experience with complex verification flows.
• Must-have: Experience with IP integration, simulation environments, and creating verification documentation.
• Must-have: Proficiency with scripting (Python, shell) for automation and verification support.
• Must-have: Strong analytical and problem-solving skills, excellent interpersonal skills, very good English, and willingness to travel.
• Nice-to-have: Experience with PCIe and CXL controller technologies and any third-party VIP.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Computer Science, or a related technical discipline.

About the Company

Company: Rambus

Headquarters: Sunnyvale, California, USA

Rambus is a global leader in advanced semiconductor and technology solutions, specializing in enhancing data access and improving performance in computing, networking, and storage applications. The company is known for its innovative IP and solutions in memory, security, and interface technologies. With a strong focus on research and development, Rambus continues to push the boundaries of technology to meet the growing demands of the digital age.