Design For Test Engineer

Role Summary

We are seeking an experienced Design For Test engineer to join our CPU Cores team in Cambridge, UK. The ideal candidate will have a strong technical background and experience in DFT methodologies, particularly in the context of CPU core design and development.

Experience Level

This position is suitable for a senior-level candidate.

Responsibilities

• Keep abreast with the latest industry trends in DFT domain and help adopt the latest DFT techniques and methodologies into AMD products.
• Define and implement DFT architecture and features for next-generation multi-core microprocessor designs and support their verification effort.
• Work closely with architects, design, verification, physical design, and product engineering teams to integrate DFT requirements seamlessly.
• Coordinate with DFT teams across different time zones to develop unified DFT strategies.
• Work closely with DFT Tool Vendors and drive improvements based on the testability requirements.
• Develop efficient DFx flows and methodology compatible with front end and back end design flows.
• Work with product, test engineering teams and post-silicon debug teams to ensure successful silicon bring-up.
• Mentor and coach junior engineers.

Requirements

• Strong knowledge in Design for Testability (DFT) and solid experience.
• Strong analytical and problem-solving abilities.
• Outstanding communication skills and experience working with engineers across various locations and time zones.
• Proactive self-starter capable of taking initiative and driving tasks to successful completion.

Education Requirements

• Bachelors or Masters or PhD in Computer engineering/Electrical engineering/Electronics Engineering