Design for Test (DFT) Engineer

Job Title

Design for Test (DFT) Engineer

Role Summary

Responsible for developing and implementing testability solutions for complex digital ASICs, SoCs and processors. Works with design, verification, and test engineering teams to ensure testability is considered throughout the product lifecycle.

Experience Level

Mid-level. Typical experience expectation: the role is commonly filled by engineers with several years of ASIC/DFT experience (see Education Requirements for the degree-to-experience mapping).

Responsibilities

Primary responsibilities include architecture, implementation, verification, and test pattern generation for DFT on complex chips.

• Develop DFT architecture and implement scan, BIST, compression, and related test structures for ASICs/SoCs.
• Perform testability analysis and generate test patterns for manufacturing and in-field diagnostics.
• Verify DFT features within design and verification flows; collaborate with verification engineers to close issues.
• Design and simulate circuits at transistor level to meet architecture and requirement specifications.
• Contribute to system-level design and evaluate hardware feasibility of algorithms and requirements.
• Optimize hardware designs for performance, power, and cost while maintaining testability.
• Document and teach best practices; guide less experienced engineers and small technical teams.
• Support physical implementation tasks such as floor-planning and simulations using extracted parasitics.
• Contribute to proposal and business development activities as needed.

Requirements

Key technical skills, experience, and professional attributes required.

• Proven experience in DFT for digital ASICs/SoCs, including test architecture and test pattern generation.
• Hands-on IC design experience and proficiency with transistor-level simulation and verification tools.
• Strong understanding of integrated circuits, semiconductors, and computer architecture.
• Experience collaborating across design, verification, and test disciplines to resolve test-related issues.
• Excellent written and verbal communication skills; ability to produce detailed design specifications.
• Strong analytical, organizational, and time-management skills; ability to meet deadlines and prioritize tasks.
• Demonstrated ability to work independently, drive solutions for ambiguous requirements, and lead small teams.
• Ability to obtain and maintain a government security clearance is required.

Education Requirements

Requires a Bachelor's degree in Engineering or a related field; a Master's degree is preferred and a PhD is accepted. Experience expectations provided in the posting: 5–7 years with a bachelor's, 3–5 years with a master's, or 0–2 years with a PhD in ASIC hardware engineering or a related discipline.

About the Company

Company: Draper

Headquarters: Cambridge, MA, United States

Draper is an independent, nonprofit research and development organization based in Cambridge, Massachusetts. With over 2,000 employees, Draper develops advanced technologies in defense, space, biomedical engineering, and other national-security and commercial domains through multidisciplinary teams of engineers and scientists.