Design Engineer II β Foundation IP Quality Lead
Lead product validation and quality efforts for Foundation IP (standard cells, I/O libraries, memory compilers) across advanced process nodes. Ensure IP meets performance, manufacturability, and reliability targets through validation, sign-off, and cross-team coordination.
Work with design, validation, and customer teams and mentor engineers to implement reproducible quality processes.
Mid-level β 4+ years of relevant semiconductor IP QA or design experience.
Primary duties include quality strategy, validation sign-off, and cross-team coordination.
Must-have technical skills and experience.
Nice-to-have:
B.S. or M.S. in Electrical Engineering or Computer Engineering.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
