Design Engineer 3

Job Title

Design Engineer 3

Role Summary

The Design Engineer 3 is an individual contributor responsible for digital integrated circuit design and verification activities. The role works with cross-functional teams to implement, verify, and deliver silicon-ready RTL and support bring-up and debug.

Experience Level

Mid-level. Specific years of experience not specified.

Responsibilities

Primary responsibilities include design, verification, and cross-team collaboration to deliver product features into silicon.

• Develop and maintain RTL for digital blocks and subsystems.
• Create and execute verification plans, including unit and integration-level verification.
• Work with synthesis and timing teams to achieve timing closure and area/power targets.
• Debug pre- and post-silicon issues using simulation and lab-based bring-up tools.
• Collaborate with system, firmware, layout, and test teams to integrate designs.
• Document designs and participate in design reviews.

Requirements

Key technical requirements and desirable skills.

• Must-have: Practical experience in digital IC design and RTL implementation (Verilog or VHDL), verification methodologies, and EDA flows (synthesis, STA).
• Must-have: Experience debugging RTL and silicon issues using simulation and lab equipment.
• Must-have: Proficiency with scripting (e.g., Python, Tcl) to automate flows and analyses.
• Nice-to-have: Experience with FPGA prototyping, low-power design techniques, high-speed IO (SerDes), or protocol IP (PCIe, Ethernet).
• Nice-to-have: Familiarity with system-level integration and cross-functional product development.

Education Requirements

Not specified.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.