DDR Design Verification Engineer - Staff

Job Title

DDR Design Verification Engineer - Staff

Role Summary

Lead verification for DDR5 and LPDDR6 memory IP, owning verification plans, UVM environments, regressions, and coverage closure. Collaborate with design and VIP teams to ensure protocol compliance and tape-out readiness, and mentor junior verification engineers.

Experience Level

Senior level — typically requires 5+ years of verification experience, especially with UVM and complex digital IP.

Responsibilities

Primary responsibilities include ownership of verification strategy, testbench development, debugging, and cross-team collaboration.

• Lead verification efforts for DDR5 and LPDDR6 IP from microarchitecture study through regression closure
• Study and interpret JEDEC specifications and build comprehensive protocol and corner-case tests
• Develop and maintain UVM-based verification environments: testbenches, scoreboards, checkers, and coverage models
• Debug complex RTL and testbench issues; trace failures and resolve root causes with design teams
• Analyze regression results, triage failures, identify patterns, and drive coverage closure
• Integrate and configure verification IP (VIP) for DDR protocols, AXI, CHI, and related interfaces
• Mentor junior verification engineers, review code and test plans, and improve verification practices

Requirements

Must-have skills and preferred additions.

• 5+ years hands-on experience with UVM-based verification on complex digital IP or SoC projects
• Deep practical knowledge of DDR protocols (DDR5 or LPDDR6) and JEDEC compliance requirements
• Strong RTL debugging skills using simulation tools and waveform analysis
• Proven ability to develop verification plans, build UVM testbenches, and achieve coverage closure on production IP
• Experience with AXI, CHI, CRYPTO, or RAS protocols is a strong plus
• Scripting for automation and regression analysis (Shell, Perl, Python, TCL) is a plus
• Experience mentoring junior engineers and working across time zones

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.